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专利名称：MOS transistor channel structure
发明人：Hshieu, Fwu-Iuan,Yilmaz, Hamza,Chang, Mike申请号：EP93306133.5申请日：19930803公开号：EP0583911A1公开日：19940223
专利附图：
摘要：A low threshold voltage power DMOS transistor structure is disclosed having alightly doped channel region formed in a shallow layer of relatively lightly dopedepitaxial silicon. The light doping of the shallow epitaxial layer minimizes variations inthreshold voltage and local variations in punch-through susceptibility due to
nonuniformities in epitaxial doping concentration. A relatively heavily doped epitaxiallayer is disposed underneath the shallow lightly doped epitaxial layer to reduce the drainto source resistance, RDS. Because the relatively heavily doped epitaxial layer is locatedbelow the channel region and not in the regions of the structure most susceptible tobody region punch-through, providing the relatively highly doped epitaxial layer doesnot cause variations in threshold voltage and does not cause variations in the reverse biasvoltage at which punch-through across the body region occurs.
申请人：SILICONIX INCORPORATED
地址：2201 Laurelwood Road, M/S 12 Santa Clara, California 95054 US
国籍：US
代理机构：Jones, Ian
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