LTC4352CDD-PBF资料

LTC4352Low Voltage Ideal Diode Controller with MonitoringFEATURES

Low Loss Replacement for Power Dioden Controls N-Channel MOSFETn 0V to 18V Supply ORing or Holdupn 0.5μs Turn-On and Turn-Off Timen Undervoltage and Overvoltage Protectionn Open MOSFET Detectn Status and Fault Outputsn Hot Swappablen Reverse Current Enable Inputn 12-Pin MSOP and DFN (3mm × 3mm) PackagesnDESCRIPTION

The LTC®4352 creates a near-ideal diode using an external N-channel MOSFET. It replaces a high power Schottky diode and the associated heat sink, saving power and board area. The ideal diode function permits low loss power ORing and supply holdup applications. The LTC4352 regulates the forward voltage drop across the MOSFET to ensure smooth current transfer in diode-OR applications. A fast turn-on reduces the load voltage droop during supply switch-over. If the input supply fails or is shorted, a fast turn-off minimizes reverse currents.The controller operates with supplies from 2.9V to 18V. For lower voltages, an external supply is needed at the VCC pin. Power passage is disabled during undervoltage or overvoltage conditions. The controller also features an open MOSFET detect circuit that fl ags excessive voltage drop across the pass transistor in the on state. A REV pin enables reverse current, overriding the diode behavior when desired.,LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.

APPLICATIONS

Redundant Power Suppliesn Supply Holdupn Telecom Infrastructuren Computer Systems and ServersnTYPICAL APPLICATION

2.9V to 18V Ideal Diode4.0

Si7336ADP

2.9V TO 18VTO LOAD

POWER DISSIPATION (W)0.1μF*3.53.02.52.01.51.00.500

2

MOSFET (Si7336ADP)46

LOAD CURRENT (A)

8

10

4352 TA01b

Power Dissipation vs Load CurrentDIODE (SBG1025L)CPOSOURCEVIN0.1μF

VCCUVOVREV*OPTIONALGNDLTC4352GATEOUTSTATUSFAULT4352 TA01MOSFET ONSTATUSFAULT

POWERSAVED4352f1

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LTC4352ABSOLUTE MAXIMUM RATINGS

(Notes 1, 2)VIN, SOURCE Voltages ...............................–0.3V to 24VVCC Voltage ..................................................–0.3V to 7V OUT Voltage ..................................................–2V to 24VCPO, GATE Voltages (Note 3) .....................–0.3V to 30VCPO D.C. Current ...................................................10mA UV, OV, REV Voltages..................................–0.3V to 24VFAULT, STATUS Voltages ............................–0.3V to 24VFAULT, STATUS Currents..........................................5mAOperating Ambient Temperature Range LTC4352C ................................................0°C to 70°C LTC4352I..............................................–40°C to 85°CStorage Temperature Range ...................–65°C to 150°CLead Temperature (Soldering, 10 sec) MS Package ......................................................300°CPIN CONFIGURATION

TOP VIEW

VINVCCUVOVSTATUSFAULT

12345613

12SOURCE11GATE10CPO9GND8OUT7REV

VIN

VCCUVOVSTATUSFAULT

123456

TOP VIEW

121110987

SOURCEGATECPOGNDOUTREV

DD PACKAGE

12-PIN (3mm × 3mm) PLASTIC DFN

TJMAX = 125°C, θJA = 43°C/WEXPOSED PAD (PIN 13) PCB GND CONNECTION OPTIONALMS PACKAGE

12-LEAD PLASTIC MSOPTJMAX = 125°C, θJA = 1°C/WORDER INFORMATION

LEAD FREE FINISHLTC4352CDD#PBFLTC4352IDD#PBFLTC4352CMS#PBFLTC4352IMS#PBFTAPE AND REELLTC4352CDD#TRPBFLTC4352IDD#TRPBFLTC4352CMS#TRPBFLTC4352IMS#TRPBFPART MARKING*LDPJLDPJ43524352PACKAGE DESCRIPTION12-Pin (3mm × 3mm) Plastic DFN12-Pin (3mm × 3mm) Plastic DFN12-Lead Plastic MSOP12-Lead Plastic MSOPTEMPERATURE RANGE0°C to 70°C–40°C to 85°C0°C to 70°C–40°C to 85°CConsult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.Consult LTC Marketing for information on non-standard lead based fi nish parts.For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/4352f2

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LTC4352E LECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating SYMBOLSuppliesVINInput Operating RangeWith External 2.9V to 4.7V VCC SupplyWith External 4.7V to 6V VCC SupplyVCC External Supply RangeVCC Internal Regulator VoltageVIN Supply CurrentExternal VCC Supply CurrentVCC Undervoltage Lockout ThresholdVCC Undervoltage Lockout HysteresisForward Regulation Voltage (VIN − VOUT)MOSFET Gate Drive (VGATE – VSOURCE)GATE Turn-On DelayGATE Turn-Off DelayUV, OV Threshold VoltageUV, OV Threshold HysteresisREV Threshold VoltageUV, OV CurrentREV CurrentOUT CurrentSOURCE CurrentCPO Pull-Up CurrentGATE Fast Pull-Up CurrentGATE Fast Pull-Down CurrentGATE Off Pull-Down CurrentSTATUS, FAULT Leakage CurrentSTATUS, FAULT Pull-Up CurrentSTATUS, FAULT Output Low VoltageSTATUS, FAULT Output High VoltageMOSFET On Detect ThresholdOpen MOSFET Threshold (VIN – VOUT) V = 0.5VVREV = 1VVOUT = 0V, 12VVSOURCE = 0VVCPO = VIN = 2.9VVCPO = VIN = 18VVFWD = 0.2V, ΔVGATE = 0V, VCPO = 17VVFWD = –0.2V, ΔVGATE = 5VVUV = 0V, ΔVGATE = 2.5VV = 18VV = 0VI = 1.25mAI = –1μASTATUS Pulls Low, VFWD = 50mVFAULT Pulls LowVFWD = 0.1V, I = 0 and –1μACGATE = 10nF, VFWD = 0.2VCGATE = 10nF, VFWD = −0.2VVUV Falling, VOV RisingVIN = 0V, VCC = 5V, VOUT = 18VVCC = 5V, VIN = 0VVCC Risinglllllllllltemperature range, otherwise specifi cations are at TA = 25°C. VIN = 12V, VSOURCE = VIN, VOUT = VIN, VCC Open, unless otherwise noted.PARAMETERCONDITIONSMIN2.9002.93.54.11.4–101.252.45501052.5770256.10.250.24902.50.87–13–85–60–50–90–75–1.51.51000–8–100.2VCC – 1VCC – 0.50.32000.72501.130050051.0010TYPMAX18VCC18.73–132.52.790407.50.50.55108.51.2±113200–130–115–100UNITSVVVVVmAμAmAVmVmVVμsμsmVmVVμAμAμAμAμAμAAAμAμAμAVVVmVVCC(EXT)VCC(INT)IINICCVCC(UVLO)ΔVCC(HYST)Ideal Diode ControlVFWD(REG)ΔVGATEtON(GATE)tOFF(GATE)Input/Output PinsVUV,OV(TH)ΔVUV,OV(HYST)VREV(TH)IUV,OVIREVIOUTISOURCEICPO(UP)IGATEllllllllllllllllllll60145±1–120.4IFLT,STAT(IN)IFLT,STAT(UP)VOLVOHΔVGATE(ST)VFWD(FLT)Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating for extended periods may affect device reliability and lifetime.Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specifi ed.Note 3: Internal clamps limit the GATE and CPO pins to a minimum of 5V above, and a diode below SOURCE. Driving these pins to voltages beyond the clamp may damage the device. 4352f3

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LTC4352T YPICAL PERFORMANCE CHARACTERISTICS

VCC Open, unless otherwise noted.VIN Current vs Voltage1.6

300250

1.2IIN (mA)200

ICC (mA)IIN (μA)150100500

0

–50

TA = 25°C, VIN = 12V, VSOURCE = VIN, VOUT = VIN, VIN Current vs Voltage with External VCCVCC = 5V1.501.251.000.750.500.250

VCC Current vs VoltageVIN = 0V0.8

0.4

036

9VIN (V)

121518

4352 G01

012VIN (V)

345

4352 G02

012

3VCC (V)

456

4352 G03

OUT Current vs Voltage300250

VCPO –VSOURCE (V)200IOUT (μA)150100500–50

76543210

0

3

6

9VOUT (V)

12

15

18

4352 G04

CPO Voltage vs Current7

VIN = 18VVGATE –VSOURCE (V)6543210

0

–20

–40

–60–80ICPO (μA)

–100

–120

–1

GATE Voltage vs CurrentVOUT = VIN – 0.1VVIN = 18VVIN = 2.9VVIN = 2.9V–1

0–20–40

4352 G05

–60–80IGATE (μA)

–100–120

4352 G06

STATUS, FAULT Output Low Voltage vs Current1

4.03.50.8

3.02.5VOH (V)2.01.51.00.500

1

23CURRENT (mA)

4

5

4352 G07

STATUS, FAULT Output High Voltage vs CurrentVOL (V)0.6

0.4

0.2

00–2

–4–6–8CURRENT (μA)

–10–12

4352 G08

4352f4

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LTC4352PIN FUNCTIONS

VIN (Pin 1): Voltage Sense and Supply Input. Connect this pin to the power input side of the MOSFET. The low voltage supply VCC is generated from VIN. The voltage sensed at this pin is used to control the MOSFET gate.VCC (Pin 2): Low Voltage Supply. Connect a 0.1μF capacitor from this pin to ground. When VIN ≥ 2.9V, this pin provides decoupling for an internal regulator that generates a 4.1V supply. For applications where VIN < 2.9V, connect an ex-ternal supply voltage in the range 2.9V to 6V to this pin.UV (Pin 3): Undervoltage Comparator Input. Connect this pin to an external resistive divider from VIN. If the volt-age at this pin falls below 0.5V, an undervoltage fault is detected and the MOSFET is turned off. The comparator has a built-in hysteresis of 5mV. Tie to VCC if unused.OV (Pin 4): Overvoltage Comparator Input. Connect this pin to an external resistive divider from VIN. If the volt-age at this pin rises above 0.5V, an overvoltage fault is detected and the MOSFET is turned off. The comparator has a built-in hysteresis of 5mV. Tie to GND if unused.STATUS (Pin 5): MOSFET Status Output. This pin is pulled low by an open-drain output when the external MOSFET is on. An internal 10μA current source pulls this pin up to a diode below VCC. It may be pulled above VCC using an external pull-up. Tie to GND or leave open if unused.FAULT (Pin 6): Fault Output. This pin is pulled low by an open-drain output when a fault occurs. This fault could either be an undervoltage fault, an overvoltage fault, or an open MOSFET fault. An internal 10μA current source pulls this pin up to a diode below VCC. It may be pulled above VCC using an external pull-up. Tie to GND or leave open if unused.REV (Pin 7): Reverse Current Enable Input. Connect this pin to GND for normal diode operation that blocks reverse current. Driving this pin above 1V fully turns on the MOSFET gate to allow reverse current. An internal 10μA current source pulls this pin to GND.OUT (Pin 8): Output Voltage Sense Input. Connect this pin to the output side of the MOSFET. The voltage sensed at this pin is used to control the MOSFET gate.GND (Pin 9): Device Ground.CPO (Pin 10): Charge Pump Output. Connect a capacitor from this pin to the SOURCE pin. The value of this capaci-tor is approximately 10x the gate capacitance (CISS) of the MOSFET switch. The charge stored on this capacitor is used to pull-up the gate during a fast turn-on. Leave this pin open if fast turn-on is not needed.GATE (Pin 11): MOSFET Gate Drive Output. Connect this pin to the gate of the external N-channel MOSFET switch. An internal clamp limits the gate voltage to 6.1V above, and a diode below SOURCE. During fast turn-on a 1.5A pull-up charges GATE to CPO. During fast turn-off a 1.5A pull-down discharges GATE to SOURCE.SOURCE (Pin 12): MOSFET Gate Drive Return. Connect this pin to the source of the external N-channel MOSFET switch.EXPOSED PAD (Pin 13, DD Package Only): Exposed Pad may be left open or connected to device ground.4352f5

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LTC4352FUNCTIONAL DIAGRAM

VCC2VIN1VCCCHARGEPUMPCPO104.1V100μALDO+CP4–2.57V+CP5CP30.7VUV3–UV FAULTGATE+–+0.5VSOURCECP2OPENMOSFETDETECT–OV4+OV FAULTCP1Z913EXPOSED PAD*

*DD PACKAGE ONLYGND

6

–VCC LOW+VIN–DISABLELDO+–+GATE OFF–ENABLEREVERSECURRENT25mVAMP11GATE

+–12SOURCE87VCC10μA10μAOUTREV

1V+–CP65M1STATUS

VCC10μA6M2FAULT

4352 FD4352f元器件交易网www.cecb2b.com

LTC4352OPERATION

The LTC4352 controls either single or back-to-back N-channel MOSFETs in order to emulate an ideal diode. Dual MOSFETs eliminate current fl ow from the input to the output in an input undervoltage or overvoltage condition.When enabled, an amplifi er (AMP) monitors the voltage between the VIN and OUT pins, and drives the GATE pin. The amplifi er controls the gate of the external MOSFET to servo its forward voltage drop (VIN – OUT) to 25mV. The gate voltage rises to enhance the MOSFET if the load current causes more than 25mV of drop. For large output currents the MOSFET gate is driven fully on and the voltage drop is equal to ILOAD • RDS(ON). In the case of an input supply short-circuit, when the MOSFET is conducting, a large reverse current starts fl owing from the load towards the input. The AMP detects this failure condition as soon as it appears, and turns off the MOSFET by pulling down the GATE pin. The REV pin can be used to allow reverse current, overriding the diode behavior.The AMP quickly pulls-up the GATE pin whenever it senses a large forward voltage drop. An external capacitor between the CPO and SOURCE pins is needed for fast gate pull-up. This capacitor is charged up, at device power-up, by the internal charge-pump. This stored charge is used for the fast gate pull-up. The GATE pin sources current from the CPO pin, and sinks current to the SOURCE and GND pins. Internal clamps limit the GATE to SOURCE voltage to 6.1V, and the CPO to SOURCE voltage to 6.7V. The same clamps also limit the CPO and GATE pins to a diode voltage below the SOURCE pin.OV, UV, and VCC comparators, CP1 to CP3, control power passage. The MOSFET is held off whenever the OV pin is above 0.5V, the UV pin is below 0.5V, or the VCC pin is below 2.57V. There is a 40μs delay from all three condi-tions becoming good to GATE being allowed to turn on. Overvoltage causes a fast turn-off, while undervoltage activates a 100μA pull-down on GATE after a 7μs delay.Open-drain pull-down, M1, pulls the STATUS pin low when the GATE to SOURCE voltage exceeds 0.7V, to indicate that power is passing through the MOSFET. The FAULT output, M2, pulls low during an undervoltage or overvoltage fault condition. It also pulls low when GATE is fully on and the forward voltage drop exceeds 250mV, indicating the MOSFET has too much current or has failed open circuit.LDO is a low dropout regulator that generates a 4.1V supply at the VCC pin from the VIN input. When a supply below 2.9V is being ORed, an external supply in the 2.9V to 6V range is required at the VCC pin. Comparator CP4 will disable LDO when VIN is below VCC.4352f7

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LTC4352APPLICATIONS INFORMATION

High availability systems often employ parallel-connected power supplies or battery feeds to achieve redundancy and enhance system reliability. ORing diodes have been a popular means of connecting these supplies at the point of load. Diodes with storage capacitors also hold up supply voltages when an input voltage sags or has a brownout. The disadvantage of these approaches is the diode’s signifi cant forward voltage drop and the resulting power loss. Additionally, diodes provide no information concerning the status of the sourcing supply. Separate control must therefore be added to ensure that a supply that is out of range is not allowed to affect the load.The LTC4352 solves these problems by using an external N-channel MOSFET as the pass element (see Figure 1). The MOSFET is turned on when power is being passed, allowing for a low voltage drop from the supply to the load. When the input source voltage drops below the output common supply voltage it turns off the MOSFET, thereby matching the function and performance of an ideal diode.Power Supply Confi gurationThe LTC4352 can operate with supplies down to 0V. This requires powering the VCC pin with an always present external supply in the 2.9V to 6V range. If not always present, a series 470Ω resistor or Schottky diode limits device power dissipation and backfeeding of low VCC supply when VIN is high. For a 2.9V to 4.7V VCC supply, VIN should be lower than VCC. A 0.1μF bypass capacitor should also be connected between the VCC and GND pins, close to the device. Figure 2 illustrates this.If VIN operates above 2.9V then the external supply at VCC is not needed. The 0.1μF capacitor is still required for bypassing.Q1Si7336ADP

12VC20.1μFCPOSOURCEVINC10.1μFVCCUVOVREVGND4352 F01TO LOAD

R42.7kGATEOUTSTATUSLTC4352FAULTD1MOSFETOND2FAULTD1: GREEN LED LN1351CD2: RED LED LN1261CALR52.7kFigure 1. 12V Ideal Diode with Status and Fault Indicators2.9V TO 18VTO LOAD

0V TO VCCTO LOAD0V TO 18VTO LOAD

VINVCC0.1μF

GATELTC4352GNDOUT2.9V TO 4.7VVINVCCGATELTC4352GNDOUT4.7V TO 6VVINVCCGATELTC4352GNDOUT0.1μF0.1μF4352 F02Figure 2. Power Supply Confi gurations4352f8

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LTC4352APPLICATIONS INFORMATION

CPO and GATE Start-UpIn single MOSFET applications, CPO is initially pulled up to a diode below the SOURCE pin (Figure 3). In back-to-back MOSFET applications, CPO starts off at 0V, since SOURCE is near ground (Figure 4). CPO starts ramping up 10μs after VCC clears its undervoltage lockout level. Another 40μs later, GATE will also start ramping up with CPO if UV, OV and VIN – OUT conditions allow it to. The ramp rate is decided by the CPO pull-up current into the combined CPO and GATE pin capacitances. An internal clamp limits the CPO voltage to 6.7V above SOURCE, while the fi nal GATE voltage is determined by the forward drop servo amplifi er.MOSFET SelectionThe LTC4352 drives N-channel MOSFETs to conduct the load current. The important features of the MOSFET are its threshold voltage, the maximum drain-source voltage BVDSS, and the on-resistance RDS(ON).The gate drive for the MOSFET is guaranteed to be between 5V and 7.5V. This allows the use of logic level threshold N-channel MOSFETs. The maximum allowable drain-source voltage, BVDSS, must be higher than the supply voltages as the full supply voltage can appear across the MOSFET when the input falls to 0V.The FAULT pin pulls low to signal an open MOSFET fault whenever the forward voltage drop across the enhanced MOSFET exceeds 250mV. The RDS(ON) should be small enough to conduct the maximum load current while not triggering such a fault (when using FAULT), and to stay within the MOSFET’s power rating at the maximum load current.CPO Capacitor SelectionThe recommended value of the capacitor between the CPO and SOURCE pins is approximately 10x the input capacitance, CISS, of the MOSFET. A larger capacitor takes a correspondingly longer time to charge up by the internal charge pump. A smaller capacitor suffers more voltage drop during a fast gate turn-on event as it shares charge with the MOSFET gate capacitance.VIN = 5VC2 = 0.1μF

CPO

GATEOUT

VIN = 5VC2 = 0.1μF

CPO

GATEOUT

VOLTAGE(5V/DIV)

VIN, SOURCEVCC

VOLTAGE(5V/DIV)

VINVCC

4352 FO3

TIME (2.5ms/DIV)

TIME (2.5ms/DIV)

4352 FO4

Figure 3. Start-up Waveform for Single MOSFET ApplicationFigure 4. Start-up Waveform for Back-to-Back MOSFET Application4352f9

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LTC4352APPLICATIONS INFORMATION

Undervoltage and Overvoltage ProtectionUnlike a regular diode, the LTC4352 can prevent out of range input voltages from affecting the load voltage. This requires back-to-back MOSFETs, and resistive dividers from the input to the UV and OV pins. For an example, see Figure 5.MOSFET Q2 is required to block conduction through the body diode of Q1 when its gate is held off. The resistive dividers set up the input voltage range where the ideal diode control is allowed to operate. Outside this range, the gate is held off and the FAULT pin pulls low.When using a CPO capacitor in circuit with back-to-back MOSFETs, there will be a large inrush current to the load capacitance due to the fast gate turn-on after UV, OV levels are met. Without the capacitor, the inrush will depend on the CPO pull-up current charging up the gate capacitance.Inrush ControlThe LTC4352 can be used for inrush control in applications where the input supply is hot-plugged. See Figure 6. The CPO capacitor is omitted, since fast turn-on with stored charge is not desired here. Undervoltage holds the gate off till the short pin makes contact. 40μs after the UV level is satisfi ed, the MOSFET gate ramps up due to the CPO pull-up current. A RC network on the gate further slows down the output dV/dt, while allowing fast turn-off during reverse current or overvoltage conditions. Resistor RG prevents high frequency oscillations in Q2. A dedicated hot swap controller may be needed if overcurrent protec-tion is also desired.Q2Si7336ADP12VQ1Si7336ADPTO LOAD

Q2Si7336ADP5V

Q1Si7336ADPTO LOADZ1R610kCG0.1μFRG10Ω0.15μF105kC231.6k1%1k1%3.09k1%R3VINCPOUVR2OVR1GNDLTC4352SOURCEGATEOUTFAULTSTATUSVCCREV4352 F05R3VINUVSOURCEGATEOUTLTC4352CPON/C

5.11kR2OVGND4352 F06C10.1 μF

GNDBACKPLANE

CONNECTORS

Z1: DIODES INC. SMAJ12APLUG-IN CARD

Figure 5. 5V Ideal Diode with UV and OV ProtectionFigure 6. Inrush and Ideal Diode Control on a Hot Swap Card4352f10

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LTC4352APPLICATIONS INFORMATION

External CPO SupplyThe internal charge pump takes milliseconds to charge up the CPO pin capacitor especially during device power up. This time can be shortened by connecting an external supply to the CPO pin. A series resistor is needed to limit the current into the internal clamp between the CPO and SOURCE pins. The CPO supply should also be higher than the main input supply to meet the gate drive requirements of the MOSFET. Figure 7 shows such a 5V ideal diode ap-plication, where a 12V supply is connected to the CPO pin through a 1k resistor. The 1k limits the current into the CPO pin to 5.3mA, when the SOURCE pin is grounded.Input Transient ProtectionWhen the capacitances at the input and output are very small, rapid changes in current can cause transients that exceed the 24V Absolute Maximum Rating of the VIN and OUT pins. In ORing applications using a single MOSFET, one surge suppressor connected from OUT to ground clamps all the inputs. In the absence of a surge suppressor, an output capacitance of 10μF is suffi cient in most applications to prevent the transient from exceeding 24V. Back-to-back MOSFET applications, depending on voltage levels, may require a surge suppressor on each supply input. Design ExampleThe following design example demonstrates the calcula-tions involved for selecting components in a 12V system with 10A maximum load current (see Figure 1).First, calculate the RDS(ON) of the MOSFET to achieve the desired forward drop at full load. Assuming a VFWD of 50mV (which is comfortably below the 200mV minimum open MOSFET fault threshold):V50mV

RDS(ON)≤FWD==5mΩ

ILOAD10A

The Si7336ADP offers a good solution, in a SO-8 sized package, with a maximum RDS(ON) of 4mΩ and BVDSS of 30V. The maximum power dissipation in the MOSFET is: P = I2LOAD • RDS(ON) = (10A)2 • 4mΩ = 0.4WWith a maximum steady-state thermal resistance, θJA, of 65°C/W, 0.4W causes a modest 26°C rise in junction temperature of the Si7336ADP above the ambient. The input capacitance, CISS, of the Si7336ADP is about 6500pF. Slightly exceeding the 10x recommendation, a 0.1μF capacitor is selected for C2.Q1Si7336ADP5VTO LOAD

12VR71k

C20.1μFVINSOURCEGATELTC4352OUTCPOGND4352 F07Figure 7. 5V Ideal Diode with External 12V Powering CPO for Faster Start-up and Refresh4352f11

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LTC4352APPLICATIONS INFORMATION

LEDs, D1 and D2, require around 3mA for good luminous intensity. Accounting for a 2V diode drop and 0.5V VOL, R1 and R2 are set to 2.7k.PCB Layout ConsiderationsConnect the VIN and OUT pin traces as close as possible to the MOSFET’s terminals. Keep the traces to the MOSFET wide and short to minimize resistive losses. The PCB traces associated with the power path through the MOSFET should have low resistance. See Figure 8.It is also important to put C1, the bypass capacitor for the VCC pin, as close as possible between VCC and GND. Also place C2 near the CPO and SOURCE pins. Surge suppressors, when used, should be mounted close to the LTC4352 using short lead lengths.CURRENT FLOWQ1SO-8CURRENT FLOWSFROM INPUTSUPPLYSSGDDDDTO LOADWWSOURCE12111098GATEGNDLTC4352VCCOUT7MSOP-126TRACK WIDTH W:0.03˝ PER AMPEREON 1OZ CU FOILVIA TO GROUND PLANE1VIN234C1VIA TO GROUND PLANE4352 F08DRAWING IS NOT TO SCALE!

Figure 8. Recommended PCB Layout for Power MOSFET54352f12

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LTC4352TYPICAL APPLICATIONS

Plug-in Card Supply Holdup Using Ideal Diode at InputQ1Si7336ADP12V

HOT SWAPCONTROLLERTO LOAD

SOURCEVINGATEOUT+LTC4352GNDGND

CHOLDUPGND

4352 TA02BACKPLANECONNECTORSPLUG-IN CARD

4352f13

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LTC4352PACKAGE DESCRIPTION

DD Package12-Lead Plastic DFN (3mm × 3mm)(Reference LTC DWG # 05-08-1725 Rev A)R = 0.115TYP70.70±0.052.38 ±0.101.65 ± 0.10PIN 1 NOTCHR = 0.20 OR0.25× 45°CHAMFER0.40± 0.10123.50±0.052.10±0.052.38 ±0.051.65 ±0.05PACKAGEOUTLINEPIN 1TOP MARK(SEE NOTE 6)3.00±0.10(4 SIDES)60.25± 0.050.45 BSC2.25 REFRECOMMENDED SOLDER PAD PITCH AND DIMENSIONSAPPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

0.00 – 0.052.25 REF0.200 REF0.75±0.0510.23± 0.050.45 BSC(DD12) DFN 0106 REV ABOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE5. EXPOSED PAD AND TIE BARS SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

4352f14

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LTC4352PACKAGE DESCRIPTION

MS Package12-Lead Plastic MSOP(Reference LTC DWG # 05-08-1668 Rev Ø)4.039± 0.102(.159± .004)(NOTE 3)1211109870.8± 0.127(.035± .005)0.406± 0.076(.016± .003)REF5.23(.206)MIN3.20 – 3.45(.126 – .136)GAUGE PLANE0.254(.010)DETAIL “A”

0° – 6° TYP4.90± 0.152(.193± .006)3.00± 0.102(.118± .004)(NOTE 4)0.42± 0.038(.0165± .0015)TYP0.65(.0256)BSC

0.18(.007)0.53± 0.152(.021± .006)DETAIL “A”SEATINGPLANE1.10(.043)MAX1234560.86(.034)REFRECOMMENDED SOLDER PAD LAYOUT

0.650NOTE:(.0256)1. DIMENSIONS IN MILLIMETER/(INCH)BSC2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006\") PER SIDE4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006\") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004\") MAX

0.22 – 0.38(.009 – .015)TYP0.1016± 0.0508(.004± .002)MSOP (MS12) 1107 REV Ø4352fInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.15

元器件交易网www.cecb2b.com

LTC4352TYPICAL APPLICATION

0V to 18V Ideal Diode-ORVIN10V TO 18V0.1μFSi7336ADPTO LOAD

5VCPOSOURCEVINVCCUVOVREVGNDLTC4352GATEOUTSTATUSFAULT0.1μF

VIN20V TO 18V0.1μFSi7336ADP5VCPOSOURCEVINVCCUVOVREVGNDLTC4352GATEOUTSTATUSFAULT4352 TA030.1μF

RELATED PARTS

PART NUMBERLTC1473/LTC1473LLTC1479LTC4350LT®4351LTC4354LTC4355LTC4357LTC4358LTC4411LTC4412/LTC4412HVLTC4413/LTC4413-1LTC4414LTC4416/LTC4416-1DESCRIPTIONDual PowerPath™ Switch DriverPowerPath Controller for Dual Battery SystemsHot Swappable Load Share ControllerMOSFET Diode-OR ControllerNegative Voltage Diode-OR Controller and MonitorPositive High Voltage Ideal Diode-OR and MonitorPositive High Voltage Ideal Diode Controller5A Ideal Diode2.6A Low Loss Ideal Diode in ThinSOT™Low Loss PowerPath Controller in ThinSOTDual 2.6A, 2.5V to 5.5V, Ideal Diodes in DFN-1036V Low Loss PowerPath Contoller for Large PFETsCOMMENTSN-Channel, 4.75V to 30V/3.3V to 10V, SSOP-16Three N-Channel Drivers, 6V to 28V, SSOP-36N-Channel, 1.5V to 12V, Share Bus, SSOP-16N-Channel, 1.2V to 18V, UV, OV, MSOP-10Dual N-Channel, –4.5V to –80V, SO-8, DFN-8Dual N-Channel, 9V to 80V, SO-16, DFN-14N-Channel, 9V to 80V, MSOP-8, DFN-6Internal N-Ch., 9V to 26.5V, TSSOP-16, DFN-14Internal P-Ch., 2.6V to 5.5V, 40μA IQ, SOT-23P-Channel, 2.5V to 28V/36V, 11μA IQ, TSOT-23Dual Internal P-Channel, 2.5V to 5.5V, DFN-10P-Channel, 3V to 36V, 30μA IQ, MSOP-836V Low Loss Dual PowerPath Contoller for Large PFETsDual P-Channel, 3.6V to 36V, 70μA IQ, MSOP-10ThinSOT and PowerPath are trademarks of Linear Technology Corporation.4352f16

Linear Technology CorporationLT 0708 • PRINTED IN USA

1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com© LINEAR TECHNOLOGY CORPORATION 2008